AI4EDA and Circuit Representation Learning
Multi-modal circuit datasets, task-oriented augmentation, GNN/LLM methods, and unified representations across specifications, RTL, netlists, layouts, timing, and power.
Mingjun Wang
Ph.D. Student · Department of Computer Science and Engineering · The Chinese University of Hong Kong
AI4EDA · 3D IC Design Automation · Circuit Representation Learning · Fault Simulation
AI4EDA
3D IC
Circuit Representation
Fault Simulation
I am a Ph.D. student in Computer Science and Engineering at The Chinese University of Hong Kong, advised by Prof. Bei Yu. My research primarily focuses on AI4EDA and 3D IC design automation, especially multi-modal circuit understanding, circuit representation learning, flow-oriented timing/power prediction, and scalable fault simulation.
Download CVAbout
I am currently a Ph.D. student in the Department of Computer Science and Engineering at The Chinese University of Hong Kong, advised by Prof. Bei Yu. My research centers on AI4EDA and 3D IC design automation, with a focus on circuit representation learning, multi-modal circuit datasets, and timing/power modeling across design stages.
My work studies how to represent circuits across RTL, netlists, physical layouts, timing, power, and verification signals. I am particularly interested in cross-stage knowledge distillation, task-oriented circuit data, industrial-grade 3D IC EDA design flows, early-stage 3D IC prediction, and fault simulation methods that remain useful under real design constraints.
Before joining CUHK, I received my master's degree in Electronic Information from the University of Chinese Academy of Sciences and the Institute of Computing Technology, Chinese Academy of Sciences, advised by Prof. Xiaowei Li and Prof. Huawei Li at the State Key Laboratory of Processors. I received my bachelor's degree in Microelectronics Science and Technology from Peking University, and have industrial EDA experience with CASTEST on fault simulation and ISO 26262-oriented functional safety analysis.
News
2026/07 · ICCAD 2026: Distill3D, LibPilot, and ChatFCM accepted.
2026/05 · IEEE TCAD Early Access: "Bit-Compressed Concurrent Fault Simulation with Efficient Fault List" is online.
2026/05 · ICML 2026: AnalogVerifier accepted.
2026/04 · ICLR 2026: CircuitNet 3.0 accepted as a poster paper.
2026/04 · DAC 2026: ATLAS accepted for FIT prediction with asynchronous topological learning.
2025/12 · 2nd Place at EDAthon 2025, Programming Competition on Electronic Design Automation.
2025/07 · ICML 2025: RTLDistil selected as a Spotlight paper.
2025/07 · Winner, IEEE ICLAD-DAC GenAI Hackathon 2025.
Research Interests
3D IC Design Automation
Flow-oriented automation for industrial-grade 3D IC EDA, including cross-stage timing, power, and FIT-oriented prediction.
Fault Simulation and Functional Safety
Parallel fault simulation, deterministic-pattern acceleration, sequential circuit simulation, and ISO 26262-oriented analysis.
Education
The Chinese University of Hong Kong2025 — Present
Ph.D. in Computer Science and Engineering
Advisor: Prof. Bei Yu
Research focus: AI4EDA, circuit representation learning, and 3D IC design automation
University of Chinese Academy of Sciences & ICT, CAS2022 — 2025
M.Eng. in Electronic Information · GPA 3.78/4.0 (Top 5%)
Advisors: Prof. Xiaowei Li and Prof. Huawei Li · State Key Laboratory of Processors
Peking University2018 — 2022
B.Eng. in Microelectronics Science and Technology
Selected Publications
† Equal contribution. Each entry is marked as Conference or Journal. Within each year, first-author and co-first-author work appears before other collaborations.
2026
ICCAD
ICCAD 2026ConferenceAccepted
Distill3D: Cross-Stage Knowledge Distillation for Early-Stage 3D IC Timing Prediction
Cross-stage knowledge distillation for accurate early-stage timing prediction in 3D IC design flows.
ICLR
ICLR 2026 PosterConference
CircuitNet 3.0: A Multi-Modal Dataset with Task-Oriented Augmentation for AI-Driven Circuit Design
A multi-modal circuit dataset with task-oriented augmentation for AI-driven timing and power prediction.
DAC
DAC 2026ConferenceCo-first †
ATLAS: Asynchronous Topological Learning for Accurate FIT Prediction via Decoupled Graph Neural Networks
A decoupled graph learning approach for accurate FIT prediction.
ICML
ICML 2026ConferenceCo-first †
AnalogVerifier: A Neuro-Symbolic Framework for Analog Circuit Verification
A neuro-symbolic verification framework for analog circuits.
ICCAD
ICCAD 2026ConferenceAccepted
LibPilot: Knowledge-Constrained Dual-Agent Reasoning for Standard Cell Library Tuning
Knowledge-constrained dual-agent reasoning for efficient standard-cell library tuning.
ICCAD
ICCAD 2026ConferenceAccepted
ChatFCM: Comprehension-Synthesis Decoupling for LLM-Based Functional Coverage Model Generation
A comprehension-synthesis decoupled framework for LLM-based functional coverage model generation.
TCAD
IEEE TCAD Early AccessJournal
Bit-Compressed Concurrent Fault Simulation with Efficient Fault List
A bit-compressed concurrent fault simulation method with efficient fault-list organization for design-for-test workflows.
ASP-DAC
2025
ICML
ICML 2025ConferenceSpotlight
Bridging Layout and RTL: Knowledge Distillation based Timing Prediction
Transfers physical timing knowledge from layout-aware teachers to efficient RTL-level student models.
DAC
TCAD
IEEE TCAD 2025Journal
DomSim: Hardware-Aware Hybrid Fault Simulation Approach with Dominator Tree-guided Partitioning
A hardware-aware hybrid fault simulation approach using dominator tree-guided partitioning.
DAC
ASP-DAC
ICCAD
ICCAD 2025ConferenceCo-first †
VIRTUAL: Vector-based Dynamic Power Estimation via Decoupled Multi-Modality Learning
Decoupled multi-modality learning for vector-based dynamic power estimation.
ISEDA
ISEDA 2025Conference
DFTS: An Efficient Design-for-Test Flow for Scan Design
An efficient design-for-test flow for scan design.
2024
ITC-Asia
ICCAD
Research Experience
May 2024 — Present
AI4EDA, Circuit Multi-Modal Data, and 3D IC EDA Flow Automation
- Built multi-modal circuit datasets spanning specification, RTL, netlist, layout, timing, and power data for large-scale AI4EDA benchmarking.
- Developed learning-based methods for circuit representation, cross-stage PPA prediction, and flow-oriented 3D IC design automation.
- Implemented automated pipelines for circuit representation extraction and timing/power knowledge distillation across design stages.
Jul. 2023 — Mar. 2025
Fault Simulation Research · State Key Laboratory of Processors, ICT, CAS
- Developed hardware-aware and parallel fault simulation frameworks for large-scale digital circuits.
- Studied optimization techniques for scalable circuit verification, design-for-test workflows, and functional safety analysis.
Sep. 2021 — Jan. 2025
Industrial Experience · CASTEST
- Contributed to digital circuit fault simulation platforms and functional safety analysis tools.
- Worked on ISO 26262-oriented workflows for automotive-grade chips, strengthening a practical view of industrial EDA flow requirements.
Sep. 2020 — Jun. 2022
RRAM-Based True Random Number Generator · PKU Undergraduate Thesis
- Designed and implemented an RRAM-based random number generator.
- Evaluated randomness using the NIST statistical test suite.
Honors & Awards
| Award | Venue / Organization | Year |
|---|---|---|
| Winner — IEEE ICLAD-DAC GenAI Hackathon | IEEE ICLAD & DAC | 2025 |
| 2nd Place — EDAthon Programming Competition | IEEE CEDA | 2025 |
| 2nd Prize (Enterprise Track) — IC Innovation Contest | 8th China Graduate IC Innovation Contest | 2025 |
| International Exchange Scholarship for Empowerment | ICT, CAS | 2025 |
| Director's Special Award (1st / 400) | ICT, CAS | 2024 |
| National Scholarship (Top 2%) | MoE, China | 2024 |
| Special Prize — LLM4EDA Hackathon (1st / 100) | National Key Laboratory of Integrated Chips and Systems | 2024 |
| Academic Endeavor Award | EDA Elite Challenge | 2024 |
| 1st Prize Academic Scholarship (Top 15%) | Chinese Academy of Sciences | 2024 |
| 1st Prize — EDA² Integrated Circuit Elite Challenge (1st / 230 teams) | Huawei HiSilicon | 2023 |
| Huawei Intelligent Base Scholarship (Top 5%) | Huawei | 2023 |
| Cambricon Outstanding Student Award (10 / 300) | Cambricon | 2023 |
| Outstanding Contribution Award — Beijing 2022 Winter Olympics (Top 10%) | Peking University | 2022 |
| Peking University Social Work Award | Peking University | 2019, 2020 |
Leadership & Service
- Volunteer Leader, Beijing 2022 Winter Olympics · International Olympic Committee · Oct. 2021 — Mar. 2022
- President, Student Science and Technology Association · ICT, CAS · Sep. 2023 — Dec. 2024
- Deputy Secretary-General, Student Activity Center · Peking University · Oct. 2020 — Apr. 2022
Skills
LanguagesPythonC++SystemVerilogVerilogTcl
EDA ToolsCadence InnovusSynopsys PrimeTimeSynopsys Design CompilerSynopsys VCSCadence Xcelium
AI / MLPyTorchCUDAPyTorch GeometricTensorFlow
DevelopmentLinuxGitLaTeX
Collaboration & Contact
I welcome collaborations on AI4EDA, 3D IC design automation and EDA flows, circuit representation learning, timing/power modeling, fault simulation, and hardware verification. Feel free to reach out.
Email: wangmingjun000613@gmail.com · mjwang25@cse.cuhk.edu.hk
CUHK · Department of Computer Science and Engineering · Advisor: Prof. Bei Yu
Google Scholar · GitHub · CV